Racing 2014

First Workshop on
Resource awareness and adaptivity
in multi-core computing
May 29–30, 2014, Paderborn, Germany
co-located with IEEE European Test Symposium (ETS)

Call for Papers

The steady advances in semiconductor technology allow for increasingly complex SoCs, including multiple (heterogeneous) micro processors, dedicated accelerators, large on-chip memories, sophisticated interconnection networks, and peripherals. However, design, verification, and test as well as parallel programming of such complex multi-core architectures are very challenging since they may have to deal with highly dynamic workloads in different application scenarios and environments. In addition, the architecture might alter itself, either intentionally (e.g., dynamic voltage/frequency scaling, power management) or unintentionally (e.g., failures, aging).

As a remedy, one recent research trend in multi-core computing is to design control loops across all platform layers, from application and run-time software down to the status of the underlying hardware. Concepts such as resource-aware programming and adaptive computing are promising candidates for optimizing multi-core systems at run-time with respect to several objectives (utilization, performance, temperature, energy, reliability, dependability, etc.). On the other hand, the enhanced flexibility and adaptivity of such systems raises questions on the predictability of program execution.

The Racing Workshop aims at bringing together researchers and experts from both academia and industry to discuss and exchange research advances from different disciplines in design and test of multi-core architectures as well as programming and run-time management. A distinctive feature of the workshop is its cross section through the entire software/hardware stack, ranging from programming down to multi-core hardware. Thus, Racing is targeted for all of those who are interested in understanding the big picture and the potential of resource-aware and adaptive multi-core computing, its challenges, available solutions, and enables for collaboration of the different domains.

Topics of the Racing Workshop include, but are not limited to:

Paper submission

Perspective authors are invited to submit an extended abstract (max. 6 pages) or work in progress (2 pages). All papers should be formatted as follows: A4 or letter pages, double column, single spaced, Times or equivalent font of minimum 10pt. All submissions have to be sent via the conference management system EasyChair. Please set up your own personal account if you do not already own an EasyChair account.


Accepted papers will be published on the workshop’s web page. Every accepted paper must have at least one author registered to the workshop by the time the camera-ready paper is submitted. In addition, authors will be invited to submit an extended version of their papers for publication in a journal's special issue, which will be announced at a later point in time.

Important dates

Submission deadline: March 15, 2014
Notification of acceptance: April 15, 2014
Camera-ready final version: April 30, 2014


General Chair

Jürgen Teich, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany

Program Chair

Frank Hannig, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany

Program Committee

Ali Ahmadinia, Glasgow Caledonian University, UK
Iuliana Bacivarov, ETH Zürich, Switzerland
Andreas Herkersdorf, TU München, Germany
Christoph Kessler, Linköping University, Sweden
Sébastien Pillement, University of Nantes, France
Andy D. Pimentel, University of Amsterdam, Netherlands
Thomas Schweizer, University of Tübingen, Germany
Sander Stuijk, Eindhoven University of Technology, Netherlands
Sascha Uhrig, TU Dortmund, Germany


Thursday May 29, 2014

16:00 – 16:05 Welcome
16:05 – 16:35 Keynote
16:05 – 16:35 Adaptive Real-Time Resource Management – The ACTORS Approach
  Gerhard Fohler
16:35 – 17:05 Tutorial Session: Invasive Computing (Part I)
16:35 – 17:05 Introduction to Invasive Computing
  Jürgen Teich
17:05 – 17:20 Coffee Break
17:20 – 18:20 Tutorial Session: Invasive Computing (Part II)
17:20 – 17:50 Massively Parallel Processor Architectures for Resource-aware Computing
  Vahid Lari, Alexandru Tanase, Frank Hannig, and Jürgen Teich
17:50 – 18:20 Resource-Aware Programming for Robotic Vision
  Johny Paul, Walter Stechele, Manfred Kröhnert, and Tamim Asfour
18:20 – 19:00 Poster and Demo Session
  Poster: Emulated ASIC Power and Temperature Monitor System for FPGA Prototyping of an Invasive MPSoC
  Computing Architecture
  Elisabeth Glocker, Qingqing Chen, Asheque M. Zaidi, Ulf Schlichtmann, and Doris Schmitt-Landsiedel
  Poster: Evaluating the Self-Optimization Process of the Adaptive Memory Management Architecture
  Self-aware Memory
  Oliver Mattes and Wolfgang Karl
  Poster: Resource Prediction for Humanoid Robots
  Manfred Kröhnert, Nikolaus Vahrenkamp, Johny Paul, Walter Stechele, and Tamim Asfour
  Demo: Invasive Tightly-Coupled Processor Arrays
  Vahid Lari, Éricles Sousa, Frank Hannig, and Jürgen Teich
  Demo: Resource-aware Computer Vision Application on Heterogeneous Multi-Tile Architecture
  Johny Paul, Walter Stechele, Éricles Sousa, Vahid Lari, Frank Hannig, and Jürgen Teich
20:00 Dinner

Friday May 30, 2014

9:00 – 10:30 Session 1: Fault Tolerance and Reliability in Multicore Architectures
9:00 – 9:30 Heterogeneity-aware Fault Tolerance using a Self-Organizing Runtime System
  Mario Kicherer and Wolfgang Karl
9:30 – 10:00 Resource-Aware Replication on Heterogeneous Multicores: Challenges and Opportunities
  Björn Döbel, Robert Muschner, and Hermann Härtig
10:00 – 10:30 Towards Cross-layer Reliability Analysis of Transient and Permanent Faults
  Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Michael Glaß, Faramarz Khosravi, and Mehdi B. Tahoori
10:30 – 10:50 Coffee Break
10:50 – 12:20 Session 2: Efficiency and Predictability in Parallel and Distributed Computing Systems
10:50 – 11:20 Optimized Composition: Generating Efficient Code for Heterogeneous Systems from
  Multi-Variant Components, Skeletons and Containers
  Christoph Kessler, Usman Dastgeer, and Lu Li
11:20 – 11:50 Invited talk: Using Contracts for Controlling Concurrent Change
  Sophie Quinton
11:50 – 12:20 Invited talk: The ARES CGRA Architecture – Concepts, Solutions, and Applications
  Oliver Bringmann
12:20 – 13:30 Lunch
13:30 – 15:00 Session 3: Performance Analysis and Tuning
13:30 – 14:00 Automatic Detection of Performance Anomalies in Task-Parallel Programs
  Andi Drebes, Karine Heydemann, Antoniu Pop, Albert Cohen, and Nathalie Drach
14:00 – 14:30 A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs
  Aurang Zaib, Prashanth Raju, Thomas Wild, and Andreas Herkersdorf
14:30 – 15:00 Autotuning and Self-Adaptability in Concurrency Libraries
  Thomas Karcher, Christopher Guckes, and Walter F. Tichy
  End of Workshop