@incollection{zst10,
author = {Ziener, Daniel and Schmid, Moritz and Teich, J\"urgen},
title = {{Robustness Analysis of Watermark Verification Techniques for FPGA Netlist Cores}},
booktitle={Design Methodologies for Secure Embedded Systems},
publisher = {Springer, Berlin},
volume={78},
series = {Lecture Notes in Electrical Engineering},
editor = {A. Biedermann and H. Gregor Molter},
pages={105--127},
year={2010}
}