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Lehrstuhl für Informatik 12
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Department Informatik  >  Informatik 12  >  Veröffentlichungen

Publikationen am Lehrstuhl für Hardware-Software-Co-Design

Studentische AbschlussarbeitenTutorials, Keynotes, Invited Talks, etc.BibTexSuche
Jahr:

2017
12 C. Schmitt, M. Schmid, S. Kuckuk, H. Köstler, J. Teich and F. Hannig.
Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution.
To appear in Parallel Processing Letters. ©1
11 Z. Li, H. Park, A. Malik, K. Wang, Z. Salcic, B. Kuzmin, M. Glaß and J. Teich.
Using Design Space Exploration for Finding Schedules with Guaranteed Reaction Times of Synchronous Programs on Multi-core Architecture.
J. of Systems Architecture, Elsevier, 21 pages, 2017. To appear. ©1
10 F. Smirnov, M. Glaß, F. Reimann and J. Teich.
Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks.
To appear in the Proceedings of the 54th ACM/EDAC/IEEE Design Automation Conference (DAC 2017), 6p., Austin, TX, U.S.A., June 18-22, 2017. ©1
9 F. Smirnov, M. Glaß, F. Reimann and J. Teich.
Formal Timing Analysis of Non-Scheduled Traffic in Automotive Scheduled TSN Networks.
To appear in Proceedings of Design, Automation and Test in Europe (DATE 2017), Lausanne, Switzerland, March 27-31, 2017. ©1
8 B. Pourmohseni, M. Glaß and J. Teich.
Automatic Operating Point Distillation for Hybrid Mapping Methodologies.
In Proceedings of Design, Automation and Test in Europe (DATE 2017), Lausanne, Switzerland, March 27-31, 2017. To appear.. ©1
7 H. Khdr, S. Pagani, É. Sousa, V. Lari, A. Pathania, F. Hannig, M. Shafique, J. Teich and J. Henkel.
Power Density-Aware Resource Management for Heterogeneous Tiled Multicores.
IEEE Transactions on Computers (TC), 66(3), pp. 488-501, 2017. ©3
[doi>10.1109/TC.2016.2595560]
6 H. Aliee, A. Banaiyianmofrad, M. Glaß, J. Teich and N. Dutt.
Redundancy-aware Design Space Exploration for Memory Reliability in Many-cores.
Accepted in Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMW'17). ©1
5 J. Teich.
Run-Time Monitoring and Enforcement of Non-functional Program Properties of Invasive Programs: Terms and Definitions.
Technischer Bericht, Lehrstuhl für Informatik 12, Friedrich-Alexander-Universität Erlangen-Nürnberg, 2017. ©1
4 O. Reiche, M. Özkan, F. Hannig, J. Teich and M. Schmid.
Loop Parallelization Techniques for FPGA Accelerator Synthesis.
To appear in Journal of Signal Processing Systems (JSPS). ©1
[doi>10.1007/s11265-017-1229-7]
3 A. Weichslgartner.
Application Mapping Methodologies for Invasive NoC-Based Architectures.
Dissertation, Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg, January 24, 2017. ©1
2 R. Rosales.
Holistic Actor-Oriented Modeling of Embedded Systems for ESL Power Consumption Evaluation.
Dissertation, Hardware/Software Co-Design, Department of Computer Science, Friedrich-Alexander-Universität Erlangen-Nürnberg, January 13, 2017. ©1
1 F. Khosravi, M. Glaß and J. Teich.
Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures.
To appear in IEEE Transactions on Reliability, 2017. ©1
[doi>10.1109/TR.2016.2638320]

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