[doi>10.1007/978-3-642-28293-5_4]| 2011 |
34 S. Glock, G. Fischer, R. Weigel, T. Ussmueller and R. Hasholzner. A State-Based Power Estimation Methodology at System Level for Integrated RF Front-Ends. In IEEE Semiconductor Conference Dresden (SCD), pp. 1-4, Dresden, Germany, September 2011. ©1
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33 M. Streubühr, R. Rosales, R. Hasholzner, C. Haubelt and J. Teich. ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC. In Forum on specification and Design Languages 2011, pp. 202-209, Oldenburg, Germany, Sep. 13-15, 2011. ©3
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32 S. Graf, M. Streubühr, M. Glaß and J. Teich. Analyzing Automotive Networks using Virtual Prototypes. In Proceedings of Automotive meets Electronics (AmE 2011) GMM Fachbericht 69, pp. 10-15, Dortmund, Germany, May 4-5, 2011. ©1
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31 J. Falk, C. Zebelein, C. Haubelt and J. Teich. A Rule-Based Static Dataflow Clustering Algorithm for Efficient Embedded Software Synthesis. Proceedings of Design, Automation and Test in Europe (DATE'11), IEEE Computer Society, Grenoble, France, pp. 521-526, Mar. 14-18, 2011. ©3
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30 P. Kutzer, M. Streubühr, C. Haubelt, J. Teich and A. von Schwerin. Actor-oriented Modeling of Industrial Ethernet in the Automation Domain Using SystemC . Proceedings of the Embedded World Conference, pp. 1-10, Nuremberg, Germany, Mar. 1-3, 2011. ©1
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| 2010 |
29 J. Falk, C. Zebelein, J. Keinert, C. Haubelt, J. Teich and S. Bhattacharyya. Analysis of SystemC actor networks for efficient synthesis. ACM Transactions on Embedded Computing Systems, 10(2):94–127, 2010. ©1
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28 M. Streubühr, J. Gladigau, C. Haubelt and J. Teich. Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs. In D. Borrione editor, Advances in Design Methods from Modeling Languages for Embedded Systems and SoC's, volume 63 of Lecture Notes in Electrical Engineering. pp. 59-72, Springer Netherlands, 2010. ©1
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27 R. Kiesel, O. Löhlein, A. Terzis, M. Streubühr, C. Haubelt and J. Teich. Actor-oriented Modeling of Driver Assistance Systems for Efficient Multi-Core ECU Implementation. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, pp 117-126, Dresden, Germany, Feb. 2010. ©1
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26 J. Falk, C. Zebelein, C. Haubelt, J. Teich and R. Dorsch. Integrating Hardware/Firmware Verification Efforts Using SystemC High-Level Models. In 13. ITG/GI/GMM Workshop für Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen,
Fraunhofer IIS/EAS Dresden, pp. 137-146, February 22-24, 2010. ©1
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| 2009 |
25 M. Streubühr, J. Gladigau, C. Haubelt and J. Teich. Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs. In Forum on specification and Design Languages 2009, pp. 1-6, Sophia Antipolis, France, Sep. 22-24, 2009. ©1
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24 M. Streubühr. Model-based Virtual Prototyping for Automotive Applications. Proceedings of the 3rd Chinese-German Summer School, pp. 204-209, Erlangen, Germany, May 4-22, 2009, Department of Material Science 6 - Electrical Engineering Materials, University of Erlangen-Nuremberg. ©1
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23 M. Streubühr. High-Level-Modellierung von Automotive-Anwendungen zur schnellen Virtuellen Prototypisierung. Talk at the Innovation Forum Embedded Systems, Munich, Germany, April 24, 2009. ©1
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22 J. Teich. Embedded System Design. 3rd Chinese-German Summer School, 11.5.2009, Erlangen, Germany. Invited Lecture. ©1
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21 M. Streubühr, M. Jäntsch, C. Haubelt and J. Teich. From Model-based Design to Virtual Prototypes for Automotive Applications. In Proceedings of the Embedded World Conference, pp. 1-10, Nuremberg, Germany, March 03-05, 2009. ©1
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20 J. Keinert, M. Streubühr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich and M. Meredith. SYSTEMCODESIGNER - An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications. In ACM Transactions on Design Automation of Electronic Systems, 14(1), pp. 1-23, 2009. ©1
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19 M. Streubühr, C. Haubelt and J. Teich. System Level Performance Simulation for Heterogeneous Multi-Processor Architectures. 1st HiPEAC Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), in conjunction with the 4th HiPEAC Conference, pp. 47-52, Paphos, Cyprus, January 25, 2009. ©1
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| 2008 |
18 C. Haubelt. An Actor-Oriented Design Methodology Using SystemC. Invited talk at IBM Future Technology Forum, Böblingen, Germany, December 12, 2008. ©1
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17 J. Falk, J. Keinert, C. Haubelt, J. Teich and S. Bhattacharyya. A Generalized Static Data Flow Clustering Algorithm for MPSoC Scheduling of Multimedia Applications. In Proc. of the 8th ACM & IEEE international conference on Embedded software (EMSOFT'2008), pp. 189-198,
Atlanta, Georgia, USA, October 20-22, 2008. ©1
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16 C. Haubelt, J. Falk, C. Zebelein, J. Keinert, J. Teich and S. Bhattacharyya. SystemCoDesigner - An ESL Design Methodology Based on the FunState MoC. Talk at 2nd Artist Workshop on Models of Computation and Communication, Eindhoven, The Netherlands, July 3, 2008. ©1
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15 C. Haubelt. SystemCoDesigner: Automatic Design Space Exploration and Rapid Prototyping from Behavioral Models. Talk at Center of Embedded Computer Systems, Irvine, CA, USA, June 13, 2008. ©1
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14 C. Haubelt, M. Meredith, T. Schlichter and J. Keinert. SystemCoDesigner: Automatic Design Space Exploration and Rapid Prototyping from Behavioral Models. In Proceedings of 2008 ACM/EDAC/IEEE Design Automation Conference (DAC 2008), pp. 580-585, Anaheim, CA, USA, June 8-13, 2008. ©1
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13 C. Zebelein, J. Falk, C. Haubelt and J. Teich. Classification of General Data Flow Actors into Known Models of Computation. In Proc. of the Sixth ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2008), pp. 119-128, Anaheim, CA, USA, June 5-7, 2008. ©1
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12 M. Streubühr, M. Jäntsch, C. Haubelt, J. Teich and A. Schneider. Semi-Automatic Generation of mixed Hardware-Software Prototypes from Simulink Models. 11. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Freiburg, Germany, pp. 139-148, March 03-05, 2008. ©1
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| 2007 |
11 J. Keinert, J. Falk, C. Haubelt and J. Teich. Actor-Oriented Modeling and Simulation of Sliding Window Image Processing Algorithms. Proceedings of the 2007 IEEE/ACM/IFIP Workshop of Embedded Systems for Real-Time Multimedia (ESTIMEDIA 2007), pp. 113-118, Salzburg, Oct. 4-5, 2007. ©1
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10 C. Haubelt, J. Falk, J. Keinert, T. Schlichter, M. Streubühr, A. Deyhle, A. Hadert and J. Teich. A SystemC-based Design Methodology for Digital Signal Processing Systems. In EURASIP Journal on Embedded Systems, Special Issue on Embedded Digital Signal Processing Systems, Volume 2007 (2007), Article ID 47580, 22 pages, March 2007. ©1
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| 2006 |
9 J. Falk, J. Gladigau, C. Haubelt and J. Teich. SysteMoC - Verification and Refinement of Actor-Based Models of Computation. Talk, ARTIST2 Workshop on MoCC - Models of Computation and Communication, November 16-17, Zurich, Switzerland, 2006. ©1
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8 J. Falk. Clustering SysteMoC Designs. Technical Report 06-2006, University of Erlangen-Nuremberg, Department of CS 12, Hardware-Software-Co-Design, Am Weichselgarten 3, 91058 Erlangen, Germany, October 2006. ©1
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7 J. Falk, C. Haubelt and J. Teich. Efficient Representation and Simulation of Model-Based Designs in SystemC. In Proceedings FDL'06, Forum on Design Languages 2006, Darmstadt, Germany, September 19-22, pp. 129 - 134, 2006. ©1
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6 M. Streubühr, J. Falk, C. Haubelt, J. Teich, R. Dorsch and T. Schlipf. Task-Accurate Performance Modeling in SystemC for Real-Time Multi-Processor Architectures. In Proceedings of Design, Automation and Test in Europe (DATE 2006), IEEE Computer Society, Munich, Germany, pp. 480-481, March 6-10, 2006. ©1
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5 C. Haubelt. Eine modellbasierte Entwurfsmethodik für SystemC. Invited talk, Professur Schaltkreis- und Systementwurf, TU Chemnitz, February 1, Chemnitz, Germany, 2006. ©1
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4 J. Teich. Timing Analysis of Systems of Communicating Tasks with Internal State. Technical Report 01-2006, University of Erlangen-Nuremberg, Department of CS 12, Hardware-Software-Co-Design, Am Weichselgarten 3, D-91058 Erlangen, Germany, January 2006. ©1
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3 J. Teich. Stochastic Timing Analysis of Communicating Tasks with Internal State. Technical Report 02-2006, University of Erlangen-Nuremberg, Department of CS 12, Hardware-Software-Co-Design, Am Weichselgarten 3, D-91058 Erlangen, Germany, January 2006. ©1
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| 2005 |
2 J. Falk, C. Haubelt and J. Teich. Syntax and execution behavior of SysteMoC. Technical Report 04-2005, University of Erlangen-Nuremberg, Department of CS 12, Hardware-Software-Co-Design, Am Weichselgarten 3, D-91058 Erlangen, Germany, December 2005. ©1
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1 J. Falk, C. Haubelt and J. Teich. Representing Models of Computation in SystemC. GI/ITG/GMM-Workshop 2005, Munich, Germany, April 06-07, 2005. ©1
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