ReCoBus-Builder Demo Page

2D Reconfigurable System on the ESM

• System horizontally tiled in 62 logic columns plus 4 RAM columns and four times in vertical direction
• A logic slot contains just 192 LUTs and a RAM slot just 6 BRAMs
• The communication cost is only 7 slices / 14 LUTs per logic resource slot
• All 248 logic resource slots provide a 8 bit ReCoBus connection (the ReCoBus is colored blue)
• A module can connect to the ReCoBus with up to 48 bit via multiple adjacent resource slots
• All 246 resource slots have access to a 24 bit video stream via an I/O Bar (colored green)
• Dedicated free 2D circuit switching network implemented directly inside the FPGA routing fabric (colored red)
• So far, 60 individual addressable reconfigurable modules have been partially loaded to this system
• Achieved clock frequency: 100 MHz

Implementation Alternatives of a FIR-Filter.

• Logic only implementation requiring 15 x 2 = 30 logic slots
• Logic and BRAM variant with (3 logic + 1 BRAM) x 2 = 6 logic slots + 2 BRAM slots
• Alternative with different form factor
• Modules bounding boxes are not necessary required to be continues.
  Another module may be placed inside the enlarged shown gap.

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