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Multi-core Architectures and Programming
Abstract
Multi-core processors offer a high theoretical computation performance and therefore open up new fascinating possibilities in scientific and other domains, like multimedia, medicine and finance. In order to fully exploit the performance, an efficient mapping of algorithms to the architecture of the respective multi-core processor has to be determined. Compared to traditional single-core processors, a radical rethinking of programming methodologies needs to be undertaken.
Our aims are to gain new insights into modern multi-core architectures and the corresponding programming paradigms in order to exploit the platform and to make it easier to map algorithms to the platform. As platforms, we focus in particular on graphics cards from NVIDIA (e.g. Tesla based systems) and on systems based on the Cell Processor (e.g. Sony's PLAYSTATION 3), but we look also for new architectures like Intel's upcoming Larrabee.
Contact
Frank Hannig
Richard Membarth
Publications
| 2012 | 12 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Generating Device-specific GPU Code for Local Operators in Medical Imaging.
To appear in Proceedings of the 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS), Shanghai, China, May 21-25, 2012. ©3
 | 11 R. Membarth, J. Lupp, F. Hannig, J. Teich, M. Körner and W. Eckert.
Dynamic Task-Scheduling and Resource Management for GPU Accelerators in Medical Imaging.
To appear in Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS), Munich, Germany, February 28 - March 02, 2012. ©1
| | 2011 | 10 R. Membarth, A. Lokhmotov and J. Teich.
Generating GPU Code from a High-level Representation for Image Processing Kernels.
In Proceedings of the 5th Workshop on Highly Parallel Processing on a Chip (HPPC), pp. 1-10, Bordeaux, France, Aug. 30, 2011. ©1
 | 9 G. Kouveli, F. Hannig, J. Lupp and J. Teich.
Towards Resource-Aware Programming on Intel's Single-Chip Cloud Computer Processor.
In 3rd Many-core Applications Research Community (MARC) Symposium, Ettlingen, Germany, Jul. 5-6, 2011, volume 7598 of KIT Scientific Reports, pp. 111-114, KIT Scientific Publishing, 2011. ©1
| 8 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Frameworks for GPU Accelerators: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 9th IEEE Symposium on Application Specific Processors (SASP), pp. 78-81, San Diego, CA, USA, Jun. 5-6, 2011. ©3
 | 7 R. Membarth, H. Dutta, F. Hannig and J. Teich.
Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.
Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), 5(3), 2011. ©3
| 6 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Frameworks for Multi-core Architectures: A Comprehensive Evaluation using 2D/3D Image Registration.
In Proceedings of the 24th International Conference on Architecture of Computing Systems (ARCS), pp. 62-73, Lake Como, Italy, February 22-25, 2011. ©1
| 5 R. Membarth, F. Hannig, J. Teich, G. Litz and H. Hornegger.
Detector Defect Correction of Medical Images on Graphics Processors.
Proceedings of the SPIE: Medical Imaging 2011: Image Processing, pp. 79624M 1-12, Lake Buena Vista, Orlando, FL, USA, Feb. 12-17, 2011. ©1
| | 2010 | 4 R. Membarth, F. Hannig, J. Teich, M. Körner and W. Eckert.
Comparison of Parallelization Frameworks for Shared Memory Multi-Core Architectures.
Proceedings of the Embedded World Conference, Nuremberg, Germany, March 03-05, 2010. ©1
| | 2009 | 3 R. Membarth, F. Hannig, H. Dutta and J. Teich.
Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors.
Proceedings of the 9th International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS Workshop), pp. 277-288, Samos, Greece, July 20-23, 2009. ©1
| 2 R. Membarth, F. Hannig, H. Dutta and J. Teich.
Optimization Flow for Algorithm Mapping on Graphics Cards.
Proceedings of ACACES 2009 Poster Abstracts: Advanced Computer Architecture and Compilation for Embedded Systems, pp. 229-232, Barcelona, Spain, July 12-18, 2009. ©1
| 1 R. Membarth, P. Kutzer, H. Dutta, F. Hannig and J. Teich.
Acceleration of Multiresolution Imaging Algorithms: A Comparative Study.
Proceedings of the 20th IEEE International Conference on
Application-specific Systems, Architectures and Processors (ASAP), pp. 211-214, Boston, MA, USA, July 7-9, 2009. ©2
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Studienarbeiten and Diploma Theses
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