Friedrich-Alexander-Universität DruckenUnivisEnglish FAU-Logo
Techn. Fakultät Willkommen am Department Informatik FAU-Logo
Codesign
Lehrstuhl für Informatik 12
BHT02
Department Informatik  >  Informatik 12  >  Veröffentlichungen  >  Frank Hannig  >  BHT02

Generation of Distributed Loop Control*

Marcus Bednara, Frank Hannig and Jürgen Teich

University of Paderborn, D-33098 Paderborn, Germany,
{bednara, hannig, teich}@date.upb.de,
URL: http://www-date.upb.de

Abstract. We present a new methodology for controlling the space-time behavior of VLSI and FPGA-based processor arrays. The main idea is to generate simple local control elements which take control over the activeness of each attached processor element. Each control element thereby propagates a ``start" and a ``stop execution" signal to its neighbors. We show that our control mechanism is much more efficient than existing approaches because 1) only two control signals (start/stop) are required, 2) no extension of the computation space is necessary. 3) By the local propagation of just one start/stop signal, energy is saved as processing elements are only active between the time they have received the start signal and the time they have received the stop signal. Our methodology is applicable to one- and multi-dimensional processor arrays and is based on local control signal propagation. We provide a theoretical analysis of the overhead caused by the control structure.

*Supported in part by the German Science Foundation (DFG) Project SFB 376 ''Massively Parallel Computation''.


Full article in PDF (270 KB)
BibTex entry


In Ed F. Deprettere, Jürgen Teich, and Stamatis Vassiliadis, editors, Embedded Processor Design Challenges: Systems, Architectures, Modeling, and Simulation - SAMOS.
In Lecture Notes in Computer Science (LNCS), Vol. 2268, pp. 154-170, © Springer-Verlag, Berlin, Heidelberg, 2002.

  Impressum Stand: 06 May 2004.   F.H.