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| since October 2006 |
Researcher at the
Department of Computer Science 12 (Hardware-Software-Co-Design) of the University of Erlangen-Nuremberg |
| August 2006 |
Diploma degree in Computer Science, University of Erlangen-Nuremberg, Germany |
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Publications
| 2011 | 13 J. Gladigau, A. Gerstlauer, C. Haubelt, M. Streubühr and J. Teich.
Automatic System-Level Synthesis: From Formal Application Models to Generic Bus-Based MPSoCs.
Transactions on HiPEAC: Volume 5, Issue 4, pp. 1-22, Springer, 2011. ©1
 | 12 P. Kutzer, J. Gladigau, C. Haubelt and J. Teich.
Automatic Generation of System-Level Virtual Prototypes from Streaming Application Models.
Proceedings of the 22nd IEEE International Symposium on
Rapid System Prototyping, pp. 128-134, Karlsruhe, Germany, May 24-27, 2011. ©1
| | 2010 | 11 M. Streubühr, J. Gladigau, C. Haubelt and J. Teich.
Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs.
In D. Borrione editor, Advances in Design Methods from Modeling Languages for Embedded Systems and SoC's, volume 63 of Lecture Notes in Electrical Engineering. pp. 59-72, Springer Netherlands, 2010. ©1
| 10 J. Gladigau, A. Gerstlauer, M. Streubühr, C. Haubelt and J. Teich.
A System-Level Synthesis Approach from Formal Application Models to Generic Bus-Based MPSoCs.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), pp. 118-125, Samos, Greece, July 19-22, 2010. ©3
 | | 2009 | 9 M. Streubühr, J. Gladigau, C. Haubelt and J. Teich.
Efficient Approximately-Timed Performance Modeling for Architectural Exploration of MPSoCs.
In Forum on specification and Design Languages 2009, pp. 1-6, Sophia Antipolis, France, Sep. 22-24, 2009. ©1
| 8 J. Gladigau, C. Haubelt and J. Teich.
Symbolic Scheduling of SystemC Dataflow Designs.
In M. Radetzki, editor, Languages for Embedded Systems and their Applications, volume 36 of Lecture Notes in Electrical Engineering, pages 183–199. Springer Netherlands, 2009.
Available at SpringerLink: here. ©1
| 7 J. Gladigau, C. Haubelt, M. Streubühr, J. Teich, A. Schneider, J. Knäblein and M. Lindig.
Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen.
In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Seite 157-166, Berlin, Germany, March 2-4, 2009. ©1
| 6 J. Keinert, M. Streubühr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich and M. Meredith.
SYSTEMCODESIGNER - An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications.
In ACM Transactions on Design Automation of Electronic Systems, 14(1), pp. 1-23, 2009. ©1
| | 2008 | 5 J. Gladigau, C. Haubelt and J. Teich.
Symbolic Quasi-Static Scheduling of Actor-Oriented SystemC Models.
Proceedings of Forum on specification & Design Languages 2008 (FDL08), Digital Object Identifier 10.1109/FDL.2008.4641412, pages 1-6, Stuttgart, Germany, Sep. 23-25, 2008. ©2
| 4 J. Gladigau, F. Blendinger, C. Haubelt and J. Teich.
Symbolische Modellprüfung Aktor-orientierter High-level SystemC-Modelle mit Intervalldiagrammen.
11. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, Freiburg, Germany, pp. 109-118, March 03-05, 2008. ©1
| | 2007 | 3 J. Gladigau, C. Haubelt, B. Niemann and J. Teich.
Mapping Actor-Oriented Models to TLM Architectures.
In Proceedings FDL'07, Forum on specification and Design Languages 2007, Barcelona, Spain, September 18-20, 2007. ©1
| 2 J. Falk, J. Gladigau, C. Haubelt, J. Keinert, T. Schlichter, M. Streubühr and J. Teich.
Substantiating Early Design Decisions by Automatic Design Space Exploration.
Talk at 16. European SystemC Users Group Meeting, September 18, Barcelona, Spain, 2007. ©1
| | 2006 | 1 J. Falk, J. Gladigau, C. Haubelt and J. Teich.
SysteMoC - Verification and Refinement of Actor-Based Models of Computation.
Talk, ARTIST2 Workshop on MoCC - Models of Computation and Communication, November 16-17, Zurich, Switzerland, 2006. ©1
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